Signal integrity is an important consideration in designing today's high-speed circuits and systems. To help optimize the performance of such circuits and systems, simulation-based analysis techniques that predict the signal integrity of the various circuit paths of the system are often used before the circuit is ever manufactured. In this simulation environment, signal integrity problems (caused, for example, by noise, crosstalk, or intersymbol interference) can be identified early and the design modified if necessary.
One area where simulation-based signal integrity analysis is increasingly used is in the design of printed circuit boards (“PCBs”). When designing PCB layouts, for example, it is often desirable to analyze the signal integrity of the channels between the integrated circuits (“ICs”) on the board or between various other circuit components of the PCB. In particular, the signal integrity of a channel between a driver and a buffer of a PCB layout is desirably analyzed so that the bit error rate (“BER”) and eye diagram for the channel can be accurately predicted and analyzed before the PCB is manufactured. Accordingly, improved methods for analyzing the signal integrity of channels in a PCB layout or integrated circuit design are desired.